PhysicsSemiconductor electronicsClass 12

Semiconductors, diodes and logic gates: interactive simulation

Join p-type and n-type silicon and a thin depletion layer forms at the junction, with a built-in barrier of about 0.7 V. Push carriers against it (forward bias) and current flows easily; pull them away (reverse bias) and almost nothing flows.

Useful for: JEE Main, NEET, CBSE Boards · 4 modes in one lab

What you can explore

  1. 1

    p-n junction

    Forward and reverse bias, depletion layer width, barrier height and the I–V curve for Si and Ge.
  2. 2

    Rectifier

    Half-wave and full-wave rectification with an adjustable capacitor filter and ripple.
  3. 3

    Zener regulator

    Constant output voltage, series, load and Zener currents as the input changes.
  4. 4

    Logic gates

    AND, OR, NOT, NAND, NOR and XOR with switches, a bulb and the live truth table.

Try this

That one-way behaviour turns AC into DC in a rectifier, a Zener diode holds a voltage steady, and transistors built from junctions make the logic gates in every computer. Try each one here.

  1. 1

    Forward bias a silicon junction from 0 to 1 V.

    What you should see

    Almost no current until about 0.7 V, then it rises steeply; the depletion layer narrows as V approaches V₀.

  2. 2

    Switch to germanium.

    What you should see

    The knee moves down to about 0.3 V.

  3. 3

    Compare half-wave and full-wave rectifiers without a filter.

    What you should see

    Half-wave has gaps every other half cycle; full-wave fills them and the ripple frequency doubles to 100 Hz.

  4. 4

    Add a 470 μF filter on the full-wave rectifier with a 1 kΩ load.

    What you should see

    The ripple drops to roughly a quarter of a volt (estimate 11.3 / (100 × 1000 × 470×10⁻⁶) ≈ 0.24 V).

  5. 5

    In Zener regulator, raise the input from 8 V to 20 V with R_L = 1 kΩ.

    What you should see

    The output stays at 6 V; only the Zener current grows.

  6. 6

    In Logic gates, compare NAND with AND for every input.

    What you should see

    Every output is flipped. NAND is a universal gate.

Formulas behind it

Depletion width (abrupt junction)

W∝V0−VW \propto \sqrt{V_0 - V}

Ripple frequency

fr=f (half-wave),2f (full-wave)f_r = f\ \text{(half-wave)},\quad 2f\ \text{(full-wave)}

Ripple with a capacitor filter

Vr≈VmfrRLCV_r \approx \frac{V_m}{f_r R_L C}

Zener regulator currents

Is=Vin−VZRs,IZ=Is−ILI_s = \frac{V_{in} - V_Z}{R_s},\quad I_Z = I_s - I_L

Boolean expressions

YAND=A⋅B,YOR=A+B,YNAND=A⋅B‾Y_{AND} = A\cdot B,\quad Y_{OR} = A + B,\quad Y_{NAND} = \overline{A\cdot B}

Common mistakes

  • Connecting forward bias the wrong way round. The p side goes to the positive terminal.
  • Saying reverse current is exactly zero. A small leakage current due to minority carriers flows.
  • Using a Zener diode in forward bias to regulate voltage. It regulates in reverse breakdown.
  • Mixing up NAND and NOR truth tables. NAND is 0 only when all inputs are 1; NOR is 1 only when all inputs are 0.
Practise 209 questionsCheck your answer instantly, with a worked solution.Stuck on a semiconductors, diodes and logic gates question?Snap it and get a whiteboard video solution.

FAQ

Why does a full-wave rectifier have less ripple than a half-wave one?

It uses both halves of the AC cycle, so the capacitor is recharged twice as often (100 times a second on 50 Hz mains) and has less time to discharge.

Why are NAND and NOR called universal gates?

AND, OR and NOT — and so every other digital circuit — can be built using only NAND gates, or only NOR gates.

What is the knee voltage of a diode?

The forward voltage beyond which the current increases sharply: about 0.7 V for silicon and 0.3 V for germanium.

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