Semiconductors

JEE Main level, single correct, medium

137 of 209

Question 137 of 209

The given circuit works as :

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Answer: (B) NAND gate

Let the inputs be A and B. The circuit is composed of NOR gates.
A NOR gate with its inputs tied together acts as a NOT gate.
The output of the first NOR gate (input A) is Y1=A+A‾=AˉY_1 = \overline{A+A} = \bar{A}.
The output of the second NOR gate (input B) is Y2=B+B‾=BˉY_2 = \overline{B+B} = \bar{B}.
These outputs are fed into a third NOR gate. Its output is Y3=Y1+Y2‾=Aˉ+Bˉ‾Y_3 = \overline{Y_1 + Y_2} = \overline{\bar{A} + \bar{B}}.
Using De Morgan's theorem, Y3=(Aˉ‾)⋅(Bˉ‾)=A⋅BY_3 = (\overline{\bar{A}}) \cdot (\overline{\bar{B}}) = A \cdot B.
This output Y3Y_3 is the input to the fourth NOR gate, which is configured as a NOT gate.
The final output is Yout=Y3‾=A⋅B‾Y_{out} = \overline{Y_3} = \overline{A \cdot B}.
The expression A⋅B‾\overline{A \cdot B} represents a NAND gate.

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