Semiconductors

JEE Main level, single correct, medium

134 of 209

Question 134 of 209

For the given logic gate circuit, which of the following is the correct truth table?

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Answer: (D) \(\begin{array}{c|c|c} n & m & z \\ \hline 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 1 & 0 \\ 1 & 0 & 0 \end{array}\)

The given logic circuit consists of an OR gate and a NAND gate.
The output of the OR gate is
y=n+my = n + m.
The inputs to the NAND gate are
nn and yy.
The final output
zz is given by z=n⋅y‾=n⋅(n+m)‾z = \overline{n \cdot y} = \overline{n \cdot (n + m)}.
Using Boolean algebra:
n⋅(n+m)=n⋅n+n⋅m=n+n⋅m=n(1+m)=nn \cdot (n + m) = n \cdot n + n \cdot m = n + n \cdot m = n(1 + m) = n.
Therefore,
z=n‾z = \overline{n}.
Let's verify this with the truth table:

nmy = n + mz = NAND(n, y)0001011111101010

Comparing this with the given options, option (4) matches the calculated truth table.

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